--
-- VHDL Package Body
--
-- Created:
--          by - Siebe.UNKNOWN (SIEBJE)
--          at - 14:51:02 20-05-2008
--
-- using Mentor Graphics HDL Designer(TM) 2005.3 (Build 75)
--
LIBRARY ieee;
USE ieee.std_logic_signed.all;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

PACKAGE delay_pkg IS
   FUNCTION "SLL" (left: std_logic_vector; right: integer) RETURN std_logic_vector;
   FUNCTION "SRL" (left: std_logic_vector; right: integer) RETURN std_logic_vector;
END PACKAGE delay_pkg;

PACKAGE BODY delay_pkg IS
  FUNCTION "SLL" (left: std_logic_vector; right: integer) RETURN std_logic_vector IS
   BEGIN
      RETURN to_stdlogicvector(to_bitvector(left) SLL right);
   END FUNCTION "SLL";
   
   FUNCTION "SRL" (left: std_logic_vector; right: integer) RETURN std_logic_vector IS
   BEGIN
      RETURN to_stdlogicvector(to_bitvector(left) SRL right);
   END FUNCTION "SRL";
END PACKAGE BODY delay_pkg;
